Graphical simulator of the Static Parallel Architecture
Here, we present a graphical simulator of the static parallel archutecture.
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A processor, with its registers, local stack RAM and ROM which contain its program.
The common memory, with the data read from the input port and the data written on the output port.
The main bus which acts as a control pannel. Its allows to set breakpoints in the code, to run the program step by step or in an animation mode. The main bus accesses are shown. |
FEATURES
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The code produced by the Lambda-Flow compiler is based on a deterministic loop
It could produces several target from this loop. A target is defined in a Target Code Definition File (TCDF).
A TCDF contains about 20 definitions. A definition could be a simple texte template, or a true interpreted program which is dynamically executed by Lambda-Flow.
Currently, the C, asm-386, Scheme and SPA TCDFs are defined. The used could write its own TCDF very quickly.
